Back End Developer

A leading provider of comprehensive ASIC design and turnkey manufacturing services for fabless companies and OEMs.

The company specializes in the development of high-end Systems-on-Chip (SoC), managing the entire lifecycle from architecture to production.

Located in the Sharon region, they offer a professional environment with a hybrid model of two days remote work.

The Role-

Executing the full Physical Design flow for advanced SoC components.

Managing Floor planning, Placement, and Route (P&R) processes to meet aggressive performance and density goals.

Leading Timing Closure efforts, including Static Timing Analysis (STA) and complex debugging.

Designing and optimizing Clock Tree Synthesis (CTS) and performing Power Grid Analysis to ensure robust power delivery.

Conducting Physical Verification, including LVS/DRC debugging, to ensure tape-out readiness.

Collaborating with multidisciplinary teams to deliver high-quality silicon solutions for global clients.

Requirements-

B.Sc. in Electrical Engineering from a recognized university.

6+ years of proven experience in Physical Design (Backend).

Extensive experience in Floorplanning and Place & Route (P&R).

Deep knowledge of Timing Closure and STA.

Hands-on experience with Clock Tree Synthesis (CTS).

Proficiency in Power Grid Analysis.

Solid experience in LVS/DRC debugging.

Familiarity with industry-leading EDA tools (Cadence/Synopsys).

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